ATmega644 Pin Allocation
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Pin Description
Pins allocation / reserved -------------------------- PA0 (ADC0/PCINT0) : (Joypad) NES/SNES: P1 Data IN PA1 (ADC1/PCINT1) : (Joypad) NES/SNES: P2 Data IN PA2 (ADC2/PCINT2) : (Joypad) NES/SNES: Latch PA3 (ADC3/PCINT3) : (Joypad) NES/SNES: Clock PA4 (ADC4/PCINT4) : SPI RAM CS PA5 (ADC5/PCINT5) : (Joypad) /Free PA6 (ADC6/PCINT6) : (Joypad) / Free PA7 (ADC7/PCINT7) : ESP_PROG PB0 (PCINT8/XCK0/T0) : Used for Composite Sync PB1 (PCINT9/CLKO/T1) : Reserved for Syncronous clock to other devices PB2 (PCINT10/INT2/AIN0): Reserved PB3 (PCINT11/OC0A/AIN1): Used for AD725 4FSC PB4 (PCINT12/OC0B/SS) : AD725 enable PB5 (PCINT13/MOSI) : ISP, SD, SPI RAM PB6 (PCINT14/MISO) : ISP, SD, SPI_RAM PB7 (PCINT15/SCK) : ISP, SD, SPI_RAM PC0 (SCL/PCINT16) : Used for video DAC PC1 (SDA/PCINT17) : Used for video DAC PC2 (TCK/PCINT18) : Used for video DAC PC3 (TMS/PCINT19) : Used for video DAC PC4 (TDO/PCINT20) : Used for video DAC PC5 (TDI/PCINT21) : Used for video DAC PC6 (TOSC1/PCINT22) : Used for video DAC PC7 (TOSC2/PCINT23) : Used for video DAC PD0 (PCINT24/RXD0) : Reserved for UART0 RX (Currently used MIDI IN) PD1 (PCINT25/TXD0) : Reserved for UART0 TX PD2 (PCINT26/INT0) : 'Soft' Power-on Switch (Fuzebox, Uzebox EX1) (see note 2) PD3 (PCINT27/INT1) : ESP_RST/'Soft' Power-on Switch (AVCore) (see note 2) PD4 (PCINT28/OC1B) : LED (power/SD access) PD5 (PCINT29/OC1A) : Reserved for Coin Counter (Uzebox JAMMA) PD6 (PCINT30/OC2B/ICP) : SD Slave select PD7 (OC2A/PCINT31) : Used for Audio out Notes ----- 1)PORTA current config is for NES/SNES type joysticks. 2)For some reason, the AVCore and Fuzebox did not use the same pin for the "soft power" switch. Hence, in code, both pins must be tested to detect button presses.