SPI RAM video modes
These video modes require the 128 KByte SPI RAM module to function. Modes which can optionally use the SPI RAM module are also mentioned here.
(See Mode 74 main article)
This mode supports reading sprite data from the SPI RAM with low overhead potentially allowing rich animated sprites on an expanded Uzebox. You can enable this feature using the M74_SPIRAM_SPRITES compile-time flag.
Paletted (4 bits per pixel) SPI RAM oriented mode at 7 cycles per pixel (1,5:1 pixel aspect ratio, slightly wider pixels than in Video mode 3).
- 192 pixels width (7 cycles per pixel; 24 tiles)
- X and Y scrolling
- Arbitrary (vertical) split screen regions
- 8x8 pixel tiles
- Normally 256 4 bits per pixel ROM tiles (using SPI RAM VRAM) + As many RAM tiles as fits in the RAM
- Each tile row's VRAM address and display mode is individually configurable
- Further row modes include 384 pixels wide 1bpp and 192 pixels wide 4bpp SPI RAM bitmaps
- Sprite engine supports X and Y flipping, background priority (by masks) and recoloring. Sprites are output from SPI RAM.
- The 16 color palette supports palette effects
- CPU cycles left: Depends on number of sprites used, may need lower vertical sizes for utilizing all RAM tiles
- RAM consumption: A 256 byte buffer is required for the palette, a RAM tile takes 32 bytes (half of Mode 3's respective consumption)
- Program memory consumption: Low to medium depending on required features (however ROM tiles for this mode are smaller than for Mode 3)
Mode 748 Quickstart, a short guide on how to start working with this video mode.