The leads of the crystal should be connected to the mcu pins, and the caps should be connected between each lead of the crystal and ground.
Are you asking why there is a Q1 connected the way we are describing and why there is also a Q2 drawn with dashed lines shown with the leads not connected to the mcu pins, but with each lead connected in series with capacitors to the mcu pins?
I have no idea why Q2, C9, and C10 are there drawn with dashed lines. To me that looks like they should be left unpopulated, but maybe someone else knows why they even appear on the schematic at all.
un1b0x - 2020 EUzebox BOM
Re: un1b0x - 2020 EUzebox BOM
Look at the photo of the finished Euzebox that was posted. Those footprints were indeed left unpopulated: viewtopic.php?p=7095#p7095
Re: un1b0x - 2020 EUzebox BOM
They are certainly meant to provide some alternate clock input, though I don't know what Q2 is supposed to be. The 22pF caps are connected wrong for it (they are in series with Q2, not how the caps for a crystal should connect, one on each line to ground). A cleaner example of how a crystal normally should connect is on this Uzebox schematics.
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