What the experiment shows are ROM and RAM tiles (192 ROM tiles fetching crap from the code, 64 RAM tiles pre-filled to be flat), the plain 2 bits per pixel tiled mode with various display width settings on the same screen, with horizontal scrolling. It is a Timer1 terminated mode.
The mode takes about 8 Kbytes total, the rest are mostly kernel stuff in the UZE. Of course it doesn't have a sprite blitter yet, but I have its mechanisms planned out.
What the mode has or will have in addition:
- Arbitrary vertical splits, the same like Mode 748 has.
- Arbitrary ROM / RAM tile split.
- Reloading Color 0 and/or Color 1 for every scanline if desired.
- Attribute mode for Color 0 if compiled in (about 2Kbytes extra).
- Attribute mode for Colors 1,2,3 with RAM tiles only if compiled in (about 6Kbytes extra).
- Attribute + X Mirror mode: Color 2,3 can have attributes, up to 128 RAM tiles only, bit 7 is an X mirror flag (about 6Kbytes extra).
- Sprite blitter similar to Mode 74, including support for 4 color + transparency mask sprites (if you need all the colors).
The sprite blitter by the current sketches should become capable of similar performance to Mode 74's, maybe it could be even faster.
By technology the mode is a mix of Mode 13, Mode 40 and CunningFellow's Tempest mode, employing some unusual tricks to trim down size to an acceptable level. For RAM footprint, it could compete with Mode 72 while providing a very different look and feel. 5 cycles per pixel is nearly square (it is still a little wide), so you would be able to pixel to this without the necessity of tailoring graphics to a weird pixel aspect ratio.
Of course I also try to provide a simpler interface than before, it will be a bit more complex to handle than Mode 40, but it won't be any near the difficulty of Mode 748 (much less Mode 74 which is sure a beast to tame).