SPI RAM Mode74 development

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Jubatian
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Re: SPI RAM Mode74 development

Post by Jubatian » Wed Mar 14, 2018 12:58 pm

A little update on this one.

Several plans surfaced since for the normal tiled modes combined with SPI RAM, while I also started developing an own Uzebox-style console based on non-overclocked ATmega1284's (2x ATMega1284 + SPI RAM).

I ended up with the decision of the following system, simplified from the original Mode 74 (the current Mode 748's solution is also a rather simplified variant of the original M74):
  • Two VRAMs, one in SPI RAM, one in normal RAM. Each VRAM is one byte / tile.
  • The SPI RAM VRAM is a large scrollable surface of ROM tiles, capable to access 256 tiles.
  • The normal VRAM has a switch on Bit7 selecting between an overlaid RAM tile and the bg. The low bits select the RAM tile.
This layout is compatible with what I could come up with for the 2x1284 system (there in normal RAM of the Video 1284), and even here on the Uzebox it would be quite fast (as the SPI RAM VRAM only has to be read for locating the tile to copy off into a RAM tile, otherwise all the work is done within RAM). Of course it still has a full VRAM within RAM, but with 4bpp RAM tiles this is acceptable.

Of the SPI RAM bitmap modes, the 2x1284 could display the 8 color mode (pictures using the 16 color mode don't fit in a 1284's RAM), and the 2 color 384 pixels wide mode without attributes. Of course M748 will keep having those, I am rather just noting these for compatibility, progressing towards the possibility of graphics-rich RPG and adventure (which I would like to have on the other system too if I eventually complete that).

For the design I mostly keep an RPG game's use cases in mind, so in the end I will also very likely add a 384 pixels wide tiled mode as well (for 48 characters wide text which is very useful for both RPG and adventure), this is about the same which I use in the Mode 72 prototype (although I will likely change that too, matching it with the format I introduced with Mode 40/41/42 to make it more straightforward to generate charsets, or you could just use those in Mode 40).

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Artcfox
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Re: SPI RAM Mode74 development

Post by Artcfox » Wed Mar 14, 2018 3:52 pm

Cool! I'm intrigued by the dual ATmega1284s. Do you have a fancy way to use them in tandem to generate signals that are faster than a single chip can provide, say by switching between outputs while offsetting the phase of the outputs on one of the chips?

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Re: SPI RAM Mode74 development

Post by Jubatian » Sat Mar 31, 2018 5:00 pm

The upgrade is completed, it is accessible on my fork, here:

https://github.com/Jubatian/uzebox/tree/mode748

Working examples are included ( https://github.com/Jubatian/uzebox/tree ... 8/examples ), these are the three bitmaps whose screenshots I posted earlier and the Mode 74 sprite demo modified for this mode.

Using the mode is not as convoluted as Mode 74, notably the VRAM became a lot easier to set up (it isn't as flexible as Mode 74, but good for the common cases). As above, now you can have 256 background tiles and any number of RAM tiles due to the new VRAM layout, scrolling should also be very easy if you have your map for it in the SPI RAM (I will create a demo for that later). What was lost is the RAM tile importance system, which is observable on the sprite demo: it will notably flicker more than with Mode 74 even though I gave it 76 RAM tiles.

Anyway, so this is the first proof-of-concept for an SPI RAM VRAM, results are quite satisfactory. The background map is in SPI RAM, and all the sprites are also fetched from SPI RAM, moreover it is designed so it doesn't fall apart even if the video frame interrupt cuts off an ongoing sprite blit (it cuts it off cleanly, so display won't fail).

Next tasks are likely support routines, currently even kernel functions which could be implemented are missing or broken.

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Re: SPI RAM Mode74 development

Post by D3thAdd3r » Sat Mar 31, 2018 7:17 pm

Wow this rocks, great work!

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Re: SPI RAM Mode74 development

Post by Artcfox » Sun Apr 01, 2018 1:23 am

Nice! Maybe I'll have to get one of the SPI RAM Uzebox boards.

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Re: SPI RAM Mode74 development

Post by Jubatian » Sun Apr 01, 2018 11:50 am

Fixing bugs, adding features...
mode748_mode7_text.png
Text on Mode 748
mode748_mode7_text.png (27.37 KiB) Viewed 2371 times
The mode has two bitmapped 384 pixels wide SPI RAM modes, this is without the attribute RAM, using the least amount of RAM. I added functions for faking text output on this, using the kernel's interface (so Print() and likes can do it), of course since the target is SPI RAM, they are very slow. But no RAM is used at all, which could be nice, for example if you use this row mode combined with one displaying sprites (every tile row can have its configuration independent of other rows, just like in Mode 74).

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Re: SPI RAM Mode74 development

Post by Jubatian » Sun Apr 01, 2018 6:21 pm

I added a new example which again does something fundamentally new. You can download the binary from the attachment, the source is on my fork:

https://github.com/Jubatian/uzebox/tree ... de4_scroll

It loads an up to 1300 pixels tall 4bpp image from the SD card, and scrolls it. The interesting part is that this example now has some sensible demonstrations of using the SPI RAM together with the bootloader library. Technologically as usual, the 192 pixels wide 4bpp image is too much bandwidth for the SPI RAM, so to display one, part of it has to be in RAM. Getting it scroll is so tricky.

Images can be generated for this using my quantizer:

https://github.com/Jubatian/InsaniQuant/tree/uzebox

Use its binary output format, that's what the example reads (image should be 192 x something).
Attachments
m748_m4_scroll.tar.bz2
Mode 748 4bpp bitmap scrolling
(41.13 KiB) Downloaded 81 times

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Re: SPI RAM Mode74 development

Post by Jubatian » Mon Apr 02, 2018 10:30 am

Another example added, demonstrating background scrolling.

I just modified the Mode 74 sprite demo to do it, now it scrolls around on a 64 x 64 tile background which sits in the SPI RAM. This is very fast: no VRAM rewrites are involved, the background stays as-is. 256 tiles may be used for the background, however you may use even more on one screen (every row can have its own configuration, so splitting vertically is simple).

What the examples lack are demonstrations of using multiple row modes on one screen. It works, though (I tried it often), for a kick, you could replace rows to the dummy definition in the sprite demo, and see how those rows will change without affecting the render.

Anyway, the mode feels fairly complete now, I think I will go on with realizing game ideas for it. (I think both Mode 72 and this one might be merged in Master if you would like it).
Attachments
m748spsc.uze
Background scrolling example
(29 KiB) Downloaded 87 times

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nicksen782
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Re: SPI RAM Mode74 development

Post by nicksen782 » Mon Apr 02, 2018 8:01 pm

This is super impressive!

Imagine the possibilities!

Remember how Bowser in Super Mario World would be zoomed on the screen in between battle phases? You are using the same graphics but with the extra RAM would there be enough time to do something like zoom effects?

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Re: SPI RAM Mode74 development

Post by Artcfox » Tue Apr 03, 2018 4:52 am

Woah! That looks sweet!

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